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[source in ebook] VHDL

Description: 高质量的VHDL代码乒乓处理FIFO缓存-High-quality VHDL code deal with ping-pong FIFO cache
Platform: | Size: 1024 | Author: wode | Hits:

[VHDL-FPGA-Verilog] UART

Description: 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
Platform: | Size: 1106944 | Author: xiao cao | Hits:

[USB develop] d12_usb

Description: D12固件程序，以乒乓方式自外部FIFO中读取图像数据，发送至PC-D12 firmware procedures to ping-pong manner from an external FIFO read image data, sent to the PC
Platform: | Size: 82944 | Author: 郭伟 | Hits:

[VHDL-FPGA-Verilog] pingpang

Description: FIFO读写，用使用状态机完成两片FIFO读写，乒乓操作。-FIFO read and write, using the state machine complete with two FIFO read and write, ping-pong operation.
Platform: | Size: 6144 | Author: 芦山 | Hits:

[VHDL-FPGA-Verilog] EDA

Description: 毕业设计时设计的一个基于FIFO的乒乓机制，作用是不用等待当前数据接收完后再处理，提高数据吞吐量。-A graduate of the design in the design of a FIFO based on the ping pong mechanism, effect is not waiting for the current data received after processing, improve the data throughput
Platform: | Size: 1196032 | Author: lipuran | Hits:

[VHDL-FPGA-Verilog] pingpong_operation_FIFO

Description: 通过fifo实现乒乓操作的功能，具有数据缓存的作用，特别适用于高低速的数据传输-Ping-pong operation realized by fifo function has the effect of data cache, especially suitable for high speed data transmission
Platform: | Size: 1906688 | Author: 钟朗朗 | Hits:

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